Intellitech iJTAGServer leverages Cadence Incisive Enterprise Simulator for IEEE 1149.1-2013 Silicon Instrument Verification
Interoperability enables pre-silicon verification of IP blocks and comprehensive metrics on documentation and operational quality
New Software for Mentor Graphics Questa Platform Enables Early Verification of IEEE 1149.1-2013 Compliant IP and On-chip Instruments
ISIS(tm) and NEBULA(tm) provide a powerful front end to Questa enabling IP providers to deliver pre-validated IEEE 1149.1-2013 compliant SERDES I/O, BIST and Silicon Instruments(tm) to the IP provider's customer base pre-silicon.
Intellitech CEO to present 'Holistic FPGA Configuration' at inaugural FPGA Summit December 9-11 in San Jose, CA
FPGA Summit in San Jose, CA includes key tutorials on FPGA ecosystem design that lowers product cost throughout lifecycle